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Principle ASIC designer - My client is a global company with a unique timing technology, that delivers high-speed data transfer solutions to semiconductor markets. You will need at least 5 years experience of Verilog(or VHDL), synthesis and simulation in high speed designs, and also HSPICE for trasnsistor-level design. It would also be advantageous for you to have experience with back-end layout tools (preferably Cadence) and/or submicron CMOS process design. Principle ASIC designer - My client is a global company with a unique timing technology, that delivers high-speed data transfer solutions to semiconductor markets. They require a Principle ASIC Designer to design a series of high speed, exciting, digital standard-cell ASICs. This role will also involve giving support to sales and customer technical teams and therefore may require you to travel to any part of the world. The role will require close co-operation with the company's design team based in St Petersburgh, Russia. You will need at least 5 years experience of Verilog(or VHDL), synthesis and simulation in high speed designs, and also HSPICE for trasnsistor-level design. It would also be advantageous for you to have experience with back-end layout tools (preferably Cadence) and/or submicron CMOS process design
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