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You will be responsible for the layout of analog, RF and Mixed Signal IC's within this semiconductor group. As part of the layout team, you will be responsible for the acceptance of schematics and Verilog VHDL netlists from the design team and delivering gds file of the design to the foundry. The role requires effective communication with the design team, other layout team members, project management and EDA/support engineers as the situations warrant. Typical tasks may include floor planning, custom layout, translation of data (to/from lef/def/abstract/gds), placement, routing, parasitic extraction, back annotation, post-layout simulation (incl. STA), physical design verification (DRC/LVS/PGS/EM), and tape-out. The tasks may require the candidate to provide automation through scripting and/or programming. Other tasks may include documentation, methodology improvement projects, layout tool evaluation and support, mentoring/training others, and other tasks as deemed necessary. Qualifications Candidate must have the following qualifications: Bachelor's degree in electrical engineering or equivalent Experience in layout of RF and analog integrated circuits - CMOS or bipolar Effective communication skills - written and oral 3+ years related work experience The following qualifications are considered beneficial and the candidates seeking the position should fill a minimum of three of the following: -experience with Cadence DFII (Composer, Virtuoso, Virtuoso_XL, and SKILL) -experience with physical design verification (Diva, Assura, or Calibre) -familiarity with Synopsys design compiler, physical compiler, or Cadence Silicon Ensemble -experience with Astro, Warp Route, or CCAR/VCAR -familiar with Synopsys PrimeTime, Cadence Pearl, or other static timing tool -programming experience with C, C+ -scripting experience with perl, tcl/tk, or awk -familiar with digital design (Verilog/VHDL, synthesis) -familiar with analog/RF design and simulation (Cadence ADE, spectre, spectreRF) -familiar with parasitic extraction (Diva, AssuraRCX, Calibre, or other) -knowledge of LEF/DEF/MilkyWay/liberty/ALF formats
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