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South West start-up seeks Senior ASIC Designer with skills including ASIC, VHDL, STA, verification, RTL, FPGA, xilinx, DFT, job, semiconductor, IC, digital
A new venture backed start-up developing highly integrated connectivity and networking silicon into high volume consumer markets requires experienced ASIC engineer to verify and integrate VHDL physical layer modem into a digital ASIC.
Responsible for verification and validation of embedded processor system. Requires thorough understanding of ASIC design and verification methodologies from RTL to tape-out. Xilinx FPGA experience and software coding skills (C and assembler) preferable.
Senior role that requires a minimum of 8 years engineering experience in the design and verification of digital ASIC's. Some experience in the design, implementation or verification of physical layer modems would be advantageous. Strong skills in VHDL/Verilog and appropriate FPGA/ASIC design flow tools are expected. STA, DFT, FV experience preferable.
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