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<p>Our client is a leading edge, medium sized company making solid profits!! They are a world leader in the development of power management, audio and more recently imaging semiconductor technology.
<p>Due to their continued success within the wireless and automotive field they are investing in new development areas, namely Imaging technology. With new and innovative products already released they want to further strengthen and expand this part of the business.
<p>To fuel this growth they have an immediate requirement for a Group Leader-Digital Image Processing.
<p>Description:
<p>A dynamic team working on state of the art camera on a chip technology is seeking an experienced technical team leader to provide technical compliance to imaging project specifications. The qualified candidate will lead a team of digital FPGA and ASIC designers and layout staff to develop image processing CMOS ASICS and digital function cores to specifications determined by camera system architecture requirements. These devices will be fabricated in commercial foundries. The Digital Image Processing group will work closely with the Camera System and Imaging IC Groups to provide a full vision system solution.
<p>Responsibilities:
<li>Develop and maintain a world class digital FPGA and ASIC design team and development laboratory.
<li>Provide technical leadership in image processing design and layout.
<li>Develop synchronous pipelined architectures and efficient real time image processing algorithms for low-power portable applications.
<li>Maintain an FPGA based rapid application development platform to prove real time camera operation with direct path to CMOS implementation and verification.
<li>Assist operations group in production issues and IC foundry rules.
<li>Provide prototype designs on schedule while working with other design groups to provide full camera on a chip integration.
<li>Execute on multiple concurrent designs and test structure developments.
<p>Skills required:
<li>Candidates will ideally have a minimum of 10 years experience in a digital image processing development environment (preferably portable ASIC) including technical team leadership.
<li>CADENCE design tool and Silvaco (ATLAS/SUPREME) simulation tool experience as well as Microsoft Project planning experience.
<li>MSEE or PhD EE required.
<li>Demonstrated innovation in leading edge vision systems and IP generation.
<li>Good verbal and written English is required.
<p>Excellent salary and benefit packages, including profit-based bonus and share options await the right individuals.
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