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You will be required to undertake a full range of activities essential to design, build, integrate and test state of the art systems within a formal systems engineering process. Using VHDL in acquisition, signal processing in Non-Comms/ESM work predominantly for the MoD.
Ideal candidates will have-
·Minimum of two years experience in coding, implementing & verifying VHDL for Xilinx FPGAs (preferably in a signal acquisition and processing environment).· Signal processing knowledge would help -
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