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My Client, based in Bucks, has developed high-performance datapath Software programmable Verilog/VHDL synthesizable processors. The FPGA Hardware Design Engineer will be a member of the team charged with the ongoing development of the processors, their software tools and development environment, as well as supporting their applications.
Responsibilities of the FPGA Hardware Engineer - Telecom / Networking will include:
Specifying, architecting and implementing support for new features.
Optimising the processors' RTL for current and future device families.
Specifying, architecting and developing supporting hardware components to ease integration into system solutions. For example, standard hardware blocks for:
Semaphores.
Qualifications Required:
Prospective candidates should have in-depth technical understanding of RTL-based FPGA/ASIC design, processor technology, datapath applications (e.G. Networking, DSP, multi-media, etc.) And ability to show flair and creativity. This will evident from a high level of academic success (probably 1st class degree, MSc/MEng or PhD) and a demonstrable track record of professional success. Proven experience in a development engineering role is expected. Experience of software development for embedded processors would be advantageous.
Essential experience includes: Strong Verilog HDL design skills.
Experience in some of the following would be advantageous
SystemVerilog-based testing.
Optimisation for FPGAs.
Embedded software development in assembler and/or C.
Software engineering in C++ and/or Java.
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